High-voltage, field-effect transistors (HVFETs) are well known in the semiconductor arts. Many HVFETs employ a device structure that includes an extended drain region that supports or “blocks” the applied high-voltage (e.g., 200 volts or more) when the device is in the “off” state. HVFETs of this type are commonly used in power conversion applications such as AC/DC converters for offline power supplies, motor controls, and so on. These devices can be switched at high voltages and achieve a high blocking voltage in the off state while minimizing the resistance to current flow in the “on” state. The extended drain region of a typical HVFET is usually lightly doped to support high voltages applied to the drain when the device is off. The length of the extended drain region is also increased as compared to a conventional low-voltage MOSFET to spread the electric field over a larger area so the device can sustain higher voltages. When the device is on (i.e., conducting) current flows through the extended drain region.
In a vertical HVFET structure, a mesa of semiconductor material forms the extended drain or drift region for current flow in the on-state. A trench gate structure is formed near the top of the substrate, adjacent the sidewall regions of the mesa where the body region is disposed. Application of an appropriate voltage potential to the gate causes a conductive channel to be formed along the vertical sidewall portion of the body region such that current may flow vertically through the semiconductor material, i.e., from a top surface of the substrate where the source region is disposed, down to the bottom of the substrate where the drain region is located.
Conventional power integrated circuit (IC) devices often employ a large vertical high-voltage output transistor in a configuration wherein the drain of the transistor is coupled directly to an external pin. The IC typically includes a controller circuit formed on a semiconductor die or chip that is separate from the semiconductor die that includes the high-voltage output transistor. Both semiconductor chips (the controller and output transistor) are usually housed in the same IC package. To provide start-up current for the controller circuit of the IC, a high external voltage may be applied to the external pin. The controller is typically protected from the high externally-applied voltage limited by a junction field-effect transistor (JFET) “tap” structure. For example, when the drain of the high voltage output transistor is taken to, say 550V, the tap transistor limits the maximum voltage coupled to the controller to approximately 50V, thereby providing a small (2-3 mA) current for start-up of the device. However, a problem with this type of circuit configuration occurs when the drain pin goes negative, as commonly happens in some power supply configurations. The negative swing on the drain of the vertical output HVFET can inject a large amount of minority carriers into the substrate, which can cause latch-up of the controller.